VHDL-AMS Behavioral Modeling and Simulation of a π/4 DQPSK Transceiver System

This paper describes a methodology for top-down design, modeling, and simulation of complete π/4 DQPSK system using hardware description language VHDL-AMS. Two system implementations are considered: with and without Viterbi encoder/decoder. VHDL-AMS implementations of various RF blocks (e.g. a realistic channel model) are developed, the system is simulated, and bit error rate is evaluated in the presence of noise. We show that the results of VHDL-AMS simulations for basic π/4 DQPSK system in Mentor Graphics ADVance-MS match both Agilent ADS results and theoretical calculations. Adding a simple Viterbi encoder and decoder in VHDL to the basic system results in an approximate 1.4 dB SNR improvement. This paper together is targeted towards engineers who work on behavioral modeling and simulation of complete RF systems using hardware description languages.